TriCN Introduces 90nm Base I/O Libraries; Comprehensive Portfolio of Cells Developed Specifically For High-Performance Interface Applications
SAN FRANCISCO—(BUSINESS WIRE)—Jan. 20, 2004—
TriCN, a leading developer of intellectual property
(IP) for high-speed semiconductor interface technology, today
announced the immediate availability of its Base I/O library in the 90
nanometer (nm) process. Broadly applicable to a wide variety of
interface application requirements, TriCN's Base I/O library is a
comprehensive set of cells containing all elements necessary for pad
ring assembly. The library is currently available in the TSMC process,
and the company has secured multiple design wins that have resulted in
tape-out.
TriCN's Base I/O library is particularly well suited to the
demands of high-performance interface applications. The cells are
designed to accommodate more robust power and ground demands, allowing
for an effective area gain compared to competing libraries. All cells
feature built-in noise isolation to provide improved operation and
reliability in high-performance applications. Additionally, the
library is designed to support not only bond-wire, but also flip-chip
packaging typically found in high-speed ICs.
"As high-performance interface specialists, we need to ensure that
our interface IP stays in-step with emerging geometries," explains Ron
Nikel, co-founder and Chief Technology Officer of TriCN. "We're seeing
substantial interest in our Base I/O libraries from both semiconductor
companies and foundries, which is why we've moved aggressively to
accommodate increasing demand for our pad ring assembly cells in chip
designs moving to 90 nm."
TriCN's library is well-differentiated from competing products on
the basis of the variety of cells offered, as well as the performance
and flexibility of those cells. Along with the standard array of
Corners, Breakers, Power and Ground, and LVTTL/LVCMOS cells, TriCN's
Base I/O Library includes higher performance HSTL, SSTL-2, PCI 2.2,
PCI-X 1.0, and USB 1.1, cells currently lacking in most competitive
offerings.
Availability
TriCN's Base I/O library is immediately available for flip-chip
and bond-wire applications in the TSMC 90nm, 130nm, and 180nm
processes. The library is also supported in the IBM, Chartered and
Tower processes, and is available in the 180nm and 130nm geometries.
About TriCN
Founded in 1997, San Francisco, California-based TriCN is a
leading developer of high- performance semiconductor interface
intellectual property (IP). The company provides a complete portfolio
of IP for maximizing data throughput on and off the chip, ranging from
a Base I/O library to multi-gigabit SerDes products. This IP is
designed for IC developers addressing bandwidth-intensive applications
in the communications, networking, data storage, and memory space.
TriCN's customers range from fabless semiconductor and systems
companies to foundries, including Philips, General Dynamics, SGI, IBM,
Cognigine, Internet Machines, Apple Computer and Tower Semiconductor.
For more information, please visit TriCN's web site at
www.tricn.com.
TriCN: High Performance Interface Specialists(TM)
Contact:
TriCN, Inc.
Steve McConnell, 415-625-3606
steve@tricn.com
or
Dave Communications, LLC
Kimberly Hathaway, 415-563-5972
kimberly@davecomm.net
